The present invention relates to an analog-to-digital converter, and more particularly to a parallel analog-to-digital converter capable of operating not only at high speed and with a high resolution but also with wide input dynamic range.
Conventionally, parallel comparison technique has been generally used for analog-to-digital converters processing signals requiring high speed and high precision, such as video signals, because of its high coversion speed, simplicity of circuit integration and unnecessary sample-and-hold circuits. An example of such analog-to-digital circuits is described in the specification of U.S. Pat. No. 4,276,543. Comparators, which determine the performance of an analog-to-digital converter of a parallel comparison type, have been constructed of NPN transistors using electrons as their majority carriers since comparators must process high speed signals. Therefore, the lower limit of an input dynamic range has been a value higher than the negative power source voltage by several times the base-emitter voltage V.sub.BE. If a 5 V single power source is used, for example, the input dynamic range is in the order of 1 V to 2 V.